Configuration	TouchGFX_Simple
STM32CubeMX 	5.0.0
Date	12/25/2018
MCU	STM32F769NIHx



PERIPHERALS	MODES	FUNCTIONS	PINS
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_CKP	DSIHOST_CKP
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_CKN	DSIHOST_CKN
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_D0P	DSIHOST_D0P
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_D0N	DSIHOST_D0N
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_D1P	DSIHOST_D1P
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_D1N	DSIHOST_D1N
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_TE	PJ2
FMC:SDRAM 1	SDCKE0+SDNE0	FMC_SDCKE0	PH2
FMC:SDRAM 1	SDCKE0+SDNE0	FMC_SDNE0	PH3
FMC:SDRAM 1	4 banks	FMC_BA0	PG4
FMC:SDRAM 1	4 banks	FMC_BA1	PG5
FMC:SDRAM 1	12 bits	FMC_A0	PF0
FMC:SDRAM 1	12 bits	FMC_A1	PF1
FMC:SDRAM 1	12 bits	FMC_A2	PF2
FMC:SDRAM 1	12 bits	FMC_A3	PF3
FMC:SDRAM 1	12 bits	FMC_A4	PF4
FMC:SDRAM 1	12 bits	FMC_A5	PF5
FMC:SDRAM 1	12 bits	FMC_A6	PF12
FMC:SDRAM 1	12 bits	FMC_A7	PF13
FMC:SDRAM 1	12 bits	FMC_A8	PF14
FMC:SDRAM 1	12 bits	FMC_A9	PF15
FMC:SDRAM 1	12 bits	FMC_A10	PG0
FMC:SDRAM 1	12 bits	FMC_SDCLK	PG8
FMC:SDRAM 1	12 bits	FMC_SDNCAS	PG15
FMC:SDRAM 1	12 bits	FMC_SDNRAS	PF11
FMC:SDRAM 1	12 bits	FMC_SDNWE	PH5
FMC:SDRAM 1	12 bits	FMC_A11	PG1
FMC:SDRAM 1	32 bits	FMC_D0	PD14
FMC:SDRAM 1	32 bits	FMC_D1	PD15
FMC:SDRAM 1	32 bits	FMC_D2	PD0
FMC:SDRAM 1	32 bits	FMC_D3	PD1
FMC:SDRAM 1	32 bits	FMC_D4	PE7
FMC:SDRAM 1	32 bits	FMC_D5	PE8
FMC:SDRAM 1	32 bits	FMC_D6	PE9
FMC:SDRAM 1	32 bits	FMC_D7	PE10
FMC:SDRAM 1	32 bits	FMC_D8	PE11
FMC:SDRAM 1	32 bits	FMC_D9	PE12
FMC:SDRAM 1	32 bits	FMC_D10	PE13
FMC:SDRAM 1	32 bits	FMC_D11	PE14
FMC:SDRAM 1	32 bits	FMC_D12	PE15
FMC:SDRAM 1	32 bits	FMC_D13	PD8
FMC:SDRAM 1	32 bits	FMC_D14	PD9
FMC:SDRAM 1	32 bits	FMC_D15	PD10
FMC:SDRAM 1	32 bits	FMC_D16	PH8
FMC:SDRAM 1	32 bits	FMC_D17	PH9
FMC:SDRAM 1	32 bits	FMC_D18	PH10
FMC:SDRAM 1	32 bits	FMC_D19	PH11
FMC:SDRAM 1	32 bits	FMC_D20	PH12
FMC:SDRAM 1	32 bits	FMC_D21	PH13
FMC:SDRAM 1	32 bits	FMC_D22	PH14
FMC:SDRAM 1	32 bits	FMC_D23	PH15
FMC:SDRAM 1	32 bits	FMC_D24	PI0
FMC:SDRAM 1	32 bits	FMC_D25	PI1
FMC:SDRAM 1	32 bits	FMC_D26	PI2
FMC:SDRAM 1	32 bits	FMC_D27	PI3
FMC:SDRAM 1	32 bits	FMC_D28	PI6
FMC:SDRAM 1	32 bits	FMC_D29	PI7
FMC:SDRAM 1	32 bits	FMC_D30	PI9
FMC:SDRAM 1	32 bits	FMC_D31	PI10
FMC:SDRAM 1	32-bit byte enable	FMC_NBL0	PE0
FMC:SDRAM 1	32-bit byte enable	FMC_NBL1	PE1
FMC:SDRAM 1	32-bit byte enable	FMC_NBL2	PI4
FMC:SDRAM 1	32-bit byte enable	FMC_NBL3	PI5
LTDC	RGB888 (24 bits) - DSI mode	LTDC_DSIMode	VP_LTDC_DSIMode
RCC	BYPASS Clock Source	RCC_OSC_IN	PH0/OSC_IN
RCC	BYPASS Clock Source	RCC_OSC_OUT	PH1/OSC_OUT
SYS	Serial Wire	SYS_JTCK-SWCLK	PA14
SYS	Serial Wire	SYS_JTMS-SWDIO	PA13
SYS	TIM6	SYS_VS_tim6	VP_SYS_VS_tim6



Pin Nb	PINs	FUNCTIONs	LABELs
A5	PE1	FMC_NBL1	
A6	PE0	FMC_NBL0	
A14	PA14	SYS_JTCK-SWCLK	
A15	PA13	SYS_JTMS-SWDIO	
B7	PG15	FMC_SDNCAS	
B12	PD0	FMC_D2	
C3	PI4	FMC_NBL2	
C12	PD1	FMC_D3	
C13	PI3	FMC_D27	
C14	PI2	FMC_D26	
D2	PF0	FMC_A0	
D3	PI5	FMC_NBL3	
D4	PI7	FMC_D29	
D5	PI10	FMC_D31	
D6	PI6	FMC_D28	
D10	PJ15	GPIO_Output	DSI_RESET
D13	PH15	FMC_D23	
D14	PI1	FMC_D25	
E2	PF1	FMC_A1	
E4	PI9	FMC_D30	
E12	PH13	FMC_D21	
E13	PH14	FMC_D22	
E14	PI0	FMC_D24	
F12	DSIHOST_D1P	DSIHOST_D1P	
F13	DSIHOST_D1N	DSIHOST_D1N	
G1	PH0/OSC_IN	RCC_OSC_IN	
G2	PF2	FMC_A2	
H1	PH1/OSC_OUT	RCC_OSC_OUT	
H2	PF3	FMC_A3	
H12	DSIHOST_CKP	DSIHOST_CKP	
H13	DSIHOST_CKN	DSIHOST_CKN	
H14	PG8	FMC_SDCLK	
J2	PF4	FMC_A4	
J3	PH5	FMC_SDNWE	
J4	PH3	FMC_SDNE0	
J12	DSIHOST_D0P	DSIHOST_D0P	
J13	DSIHOST_D0N	DSIHOST_D0N	
K3	PF5	FMC_A5	
K4	PH2	FMC_SDCKE0	
K13	PD15	FMC_D1	
K15	PD10	FMC_D15	
L12	PD14	FMC_D0	
L14	PD9	FMC_D14	
L15	PD8	FMC_D13	
M6	PF12	FMC_A6	
M7	PG1	FMC_A11	
M8	PF15	FMC_A9	
M15	PH12	FMC_D20	
N6	PF13	FMC_A7	
N7	PG0	FMC_A10	
N9	PE8	FMC_D5	
N11	PG5	FMC_BA1	
N12	PG4	FMC_BA0	
N14	PH9	FMC_D17	
N15	PH11	FMC_D19	
P6	PF14	FMC_A8	
P7	PJ2	DSIHOST_TE	
P8	PF11	FMC_SDNRAS	
P9	PE9	FMC_D6	
P10	PE11	FMC_D8	
P11	PE14	FMC_D11	
P14	PH8	FMC_D16	
P15	PH10	FMC_D18	
R8	PE7	FMC_D4	
R9	PE10	FMC_D7	
R10	PE12	FMC_D9	
R11	PE15	FMC_D12	
R12	PE13	FMC_D10	
PERIPHERALS	MODES	FUNCTIONS	PINS
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_CKP	DSIHOST_CKP
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_CKN	DSIHOST_CKN
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_D0P	DSIHOST_D0P
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_D0N	DSIHOST_D0N
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_D1P	DSIHOST_D1P
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_D1N	DSIHOST_D1N
DSIHOST	Adapted Command Mode with TE Pin	DSIHOST_TE	PJ2
FMC:SDRAM 1	SDCKE0+SDNE0	FMC_SDCKE0	PH2
FMC:SDRAM 1	SDCKE0+SDNE0	FMC_SDNE0	PH3
FMC:SDRAM 1	4 banks	FMC_BA0	PG4
FMC:SDRAM 1	4 banks	FMC_BA1	PG5
FMC:SDRAM 1	12 bits	FMC_A0	PF0
FMC:SDRAM 1	12 bits	FMC_A1	PF1
FMC:SDRAM 1	12 bits	FMC_A2	PF2
FMC:SDRAM 1	12 bits	FMC_A3	PF3
FMC:SDRAM 1	12 bits	FMC_A4	PF4
FMC:SDRAM 1	12 bits	FMC_A5	PF5
FMC:SDRAM 1	12 bits	FMC_A6	PF12
FMC:SDRAM 1	12 bits	FMC_A7	PF13
FMC:SDRAM 1	12 bits	FMC_A8	PF14
FMC:SDRAM 1	12 bits	FMC_A9	PF15
FMC:SDRAM 1	12 bits	FMC_A10	PG0
FMC:SDRAM 1	12 bits	FMC_SDCLK	PG8
FMC:SDRAM 1	12 bits	FMC_SDNCAS	PG15
FMC:SDRAM 1	12 bits	FMC_SDNRAS	PF11
FMC:SDRAM 1	12 bits	FMC_SDNWE	PH5
FMC:SDRAM 1	12 bits	FMC_A11	PG1
FMC:SDRAM 1	32 bits	FMC_D0	PD14
FMC:SDRAM 1	32 bits	FMC_D1	PD15
FMC:SDRAM 1	32 bits	FMC_D2	PD0
FMC:SDRAM 1	32 bits	FMC_D3	PD1
FMC:SDRAM 1	32 bits	FMC_D4	PE7
FMC:SDRAM 1	32 bits	FMC_D5	PE8
FMC:SDRAM 1	32 bits	FMC_D6	PE9
FMC:SDRAM 1	32 bits	FMC_D7	PE10
FMC:SDRAM 1	32 bits	FMC_D8	PE11
FMC:SDRAM 1	32 bits	FMC_D9	PE12
FMC:SDRAM 1	32 bits	FMC_D10	PE13
FMC:SDRAM 1	32 bits	FMC_D11	PE14
FMC:SDRAM 1	32 bits	FMC_D12	PE15
FMC:SDRAM 1	32 bits	FMC_D13	PD8
FMC:SDRAM 1	32 bits	FMC_D14	PD9
FMC:SDRAM 1	32 bits	FMC_D15	PD10
FMC:SDRAM 1	32 bits	FMC_D16	PH8
FMC:SDRAM 1	32 bits	FMC_D17	PH9
FMC:SDRAM 1	32 bits	FMC_D18	PH10
FMC:SDRAM 1	32 bits	FMC_D19	PH11
FMC:SDRAM 1	32 bits	FMC_D20	PH12
FMC:SDRAM 1	32 bits	FMC_D21	PH13
FMC:SDRAM 1	32 bits	FMC_D22	PH14
FMC:SDRAM 1	32 bits	FMC_D23	PH15
FMC:SDRAM 1	32 bits	FMC_D24	PI0
FMC:SDRAM 1	32 bits	FMC_D25	PI1
FMC:SDRAM 1	32 bits	FMC_D26	PI2
FMC:SDRAM 1	32 bits	FMC_D27	PI3
FMC:SDRAM 1	32 bits	FMC_D28	PI6
FMC:SDRAM 1	32 bits	FMC_D29	PI7
FMC:SDRAM 1	32 bits	FMC_D30	PI9
FMC:SDRAM 1	32 bits	FMC_D31	PI10
FMC:SDRAM 1	32-bit byte enable	FMC_NBL0	PE0
FMC:SDRAM 1	32-bit byte enable	FMC_NBL1	PE1
FMC:SDRAM 1	32-bit byte enable	FMC_NBL2	PI4
FMC:SDRAM 1	32-bit byte enable	FMC_NBL3	PI5
LTDC	RGB888 (24 bits) - DSI mode	LTDC_DSIMode	VP_LTDC_DSIMode
RCC	BYPASS Clock Source	RCC_OSC_IN	PH0/OSC_IN
RCC	BYPASS Clock Source	RCC_OSC_OUT	PH1/OSC_OUT
SYS	Serial Wire	SYS_JTCK-SWCLK	PA14
SYS	Serial Wire	SYS_JTMS-SWDIO	PA13
SYS	TIM6	SYS_VS_tim6	VP_SYS_VS_tim6



Pin Nb	PINs	FUNCTIONs	LABELs
A5	PE1	FMC_NBL1	
A6	PE0	FMC_NBL0	
A14	PA14	SYS_JTCK-SWCLK	
A15	PA13	SYS_JTMS-SWDIO	
B7	PG15	FMC_SDNCAS	
B12	PD0	FMC_D2	
C3	PI4	FMC_NBL2	
C12	PD1	FMC_D3	
C13	PI3	FMC_D27	
C14	PI2	FMC_D26	
D2	PF0	FMC_A0	
D3	PI5	FMC_NBL3	
D4	PI7	FMC_D29	
D5	PI10	FMC_D31	
D6	PI6	FMC_D28	
D10	PJ15	GPIO_Output	DSI_RESET
D13	PH15	FMC_D23	
D14	PI1	FMC_D25	
E2	PF1	FMC_A1	
E4	PI9	FMC_D30	
E12	PH13	FMC_D21	
E13	PH14	FMC_D22	
E14	PI0	FMC_D24	
F12	DSIHOST_D1P	DSIHOST_D1P	
F13	DSIHOST_D1N	DSIHOST_D1N	
G1	PH0/OSC_IN	RCC_OSC_IN	
G2	PF2	FMC_A2	
H1	PH1/OSC_OUT	RCC_OSC_OUT	
H2	PF3	FMC_A3	
H12	DSIHOST_CKP	DSIHOST_CKP	
H13	DSIHOST_CKN	DSIHOST_CKN	
H14	PG8	FMC_SDCLK	
J2	PF4	FMC_A4	
J3	PH5	FMC_SDNWE	
J4	PH3	FMC_SDNE0	
J12	DSIHOST_D0P	DSIHOST_D0P	
J13	DSIHOST_D0N	DSIHOST_D0N	
K3	PF5	FMC_A5	
K4	PH2	FMC_SDCKE0	
K13	PD15	FMC_D1	
K15	PD10	FMC_D15	
L12	PD14	FMC_D0	
L14	PD9	FMC_D14	
L15	PD8	FMC_D13	
M6	PF12	FMC_A6	
M7	PG1	FMC_A11	
M8	PF15	FMC_A9	
M15	PH12	FMC_D20	
N6	PF13	FMC_A7	
N7	PG0	FMC_A10	
N9	PE8	FMC_D5	
N11	PG5	FMC_BA1	
N12	PG4	FMC_BA0	
N14	PH9	FMC_D17	
N15	PH11	FMC_D19	
P6	PF14	FMC_A8	
P7	PJ2	DSIHOST_TE	
P8	PF11	FMC_SDNRAS	
P9	PE9	FMC_D6	
P10	PE11	FMC_D8	
P11	PE14	FMC_D11	
P14	PH8	FMC_D16	
P15	PH10	FMC_D18	
R8	PE7	FMC_D4	
R9	PE10	FMC_D7	
R10	PE12	FMC_D9	
R11	PE15	FMC_D12	
R12	PE13	FMC_D10	



SOFTWARE PROJECT

Project Settings : 
Project Name : TouchGFX_Simple
Project Folder : C:\FelixHu\02_Prj\07_Prj_GUI\02_Prj_TouchGFX\TouchGFX_Simple
Toolchain / IDE : EWARM V8
Firmware Package Name and Version : STM32Cube FW_F7 V1.14.0


Code Generation Settings : 
STM32Cube Firmware Library Package : Copy all used libraries into the project folder
Generate peripheral initialization as a pair of '.c/.h' files per peripheral : No
Backup previously generated files when re-generating : No
Delete previously generated files when not re-generated : Yes
Set all free pins as analog (to optimize the power consumption) : No


Toolchains Settings : 
Compiler Optimizations : 





